1. Field of the Invention
This invention relates generally to semiconductor products manufacturing, and, more particularly, to a method and apparatus for performing automatic calibration of critical dimension metrology tool.
2. Description of the Related Art
The technology explosion in the manufacturing industry has resulted in many new and innovative manufacturing processes. Today""s manufacturing processes, particularly semiconductor manufacturing processes, call for a large number of important steps. These process steps are usually vital, and therefore, require a number of inputs that are generally fine-tuned to maintain proper manufacturing control.
The manufacture of semiconductor devices requires a number of discrete process steps to create a packaged semiconductor device from raw semiconductor material. The various processes, from the initial growth of the semiconductor material, the slicing of the semiconductor crystal into individual wafers, the fabrication stages (etching, doping, ion implanting, or the like), to the packaging and final testing of the completed device, are so different from one another and specialized that the processes may be performed in different manufacturing locations that contain different control schemes.
Among the important aspects in semiconductor device manufacturing are RTA control, chemical-mechanical planarization (CMP) control, etching, and overlay control. Overlay is one of several important steps in the photolithography area of semiconductor manufacturing. Overlay process involves measuring the misalignment between two successive patterned layers on the surface of a semiconductor device. Generally, minimization of misalignment errors is important to ensure that the multiple layers of the semiconductor devices are connected and functional. As technology facilitates smaller critical dimensions for semiconductor devices, the need for reduced of misalignment errors increases dramatically.
Generally, photolithography engineers currently analyze the overlay errors a few times a month. The results from the analysis of the overlay errors are used to make updates to exposure tool settings manually. Generally, a manufacturing model is employed to control the manufacturing processes. Some of the problems associated with the current methods include the fact that the exposure tool settings are only updated a few times a month. Furthermore, currently the exposure tool updates are performed manually. Many times, errors in semiconductor manufacturing are not organized and reported to quality control personal. Often, the manufacturing models themselves incur bias errors that could compromise manufacturing quality. Calibration of tools that measure critical dimensions is important in developing semiconductor devices with polysilicon gates with consistent critical dimensions.
Generally, a set of processing steps is performed on a lot of wafers on a semiconductor manufacturing tool called an exposure tool or a stepper. The manufacturing tool communicates with a manufacturing framework or a network of processing modules. The manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which the stepper is connected, thereby facilitating communications between the stepper and the manufacturing framework. The machine interface can generally be part of an advanced process control (APC) system. The APC system initiates a control script based upon a manufacturing model, which can be a software program that automatically retrieves the data needed to execute a manufacturing process. Often, semiconductor devices are staged through multiple manufacturing tools for multiple processes, generating data relating to the quality of the processed semiconductor devices. Many times, errors can occur during the processing of semiconductor devices. These errors can cause appreciable inconsistencies in the critical dimensions of multiple parameters in the processed semiconductor devices. Furthermore, it is important to accurately measure critical dimensions of the parameters of the processed semiconductor device. Fine tuning the performance of tools that measure critical dimensions of semiconductor devices is important in obtaining accurate manufacturing data, which is used to determine multiple settings of subsequent manufacturing processes.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
In one aspect of the present invention, a method is provided for performing automatic calibration of a critical dimension metrology. A process run of semiconductor devices is performed. Critical dimension measurements are performed upon at least one of the processed semiconductor devices. A calibration adjustment procedure is performed using the critical dimension measurements.
In another aspect of the present invention, an apparatus is provided performing automatic calibration of a critical dimension metrology. The apparatus of the present invention comprises: a first processing tool capable of processing at least one semiconductor wafer; a first metrology tool interfaced with the first processing tool, the first metrology tool being capable of acquiring production data from the processed semiconductor wafer; and a calibration algorithm unit interfaced with the first metrology tool, the calibration algorithm unit being capable of calibrating the first metrology tool in response to the production data.